The present invention generally relates to data processing systems and more particularly to clock systems utilized in controlling the transfer of information in such data processing systems.
In data processing systems, the transfer of information is typically controlled by clock pulses derived from clock cycles generated by a clock system. The clock system is generally inhibited from generating clock pulses when information is not to be strobed into the receiving element so as to prevent the transfer of erroneous information or loss of information thereby creating an error condition. Accordingly, a stall signal or condition is generated. A typical example of a stall condition may be for example that condition under which a utilizing element such as a central processor is waiting for the data processing system's memory to provide information thereto. When the receiving element is expecting the information from the memory, the clock pulse is not generated for strobing in the information to the receiving element, particularly if there is an indication that the memory will not be providing such information for possibly another clock cycle. Accordingly, a stall condition is generated which however, upon an indication that the information will be presently transfered, will be cleared so as to generate another clock cycle and the clock pulses derived therefrom. It is important in such clocking systems that the clock cycle be enabled to start up again in a minimum period of time. It is also important that a stall signal not interrupt the clock cycle being presently generated. In one prior art system which uses a crystal clock, such system is not capable of being started up after being stopped until the next crystal frequency pulse is generated. Thus in such prior art system if a start-up is desired, for example, ten nanoseconds after a clock cycle of a hundred nanoseconds has begun, then ninety nanoseconds would have to expire before the system could be started up again.
It is accordingly a primary object of the present invention to provide a clock system which is adaptive in design so as to provide synchronization or start up of a clock cycle in a minimum period of time.